Design And Characterization Of Vertical MOSFET

Nur Asima, Mohammad Nasir (2012) Design And Characterization Of Vertical MOSFET. Project Report. UTeM, Melaka, Malaysia. (Submitted)

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Abstract

Vertical MOSFET is a device structure that considered overcoming the Short Channel Effects (SCEs) in nanometer scale device structure. In this research, the comparison between Drain-On-Top (DOT) and Source-On-Top (SOT) of Double Gate Vertical MOSFET were developed by using the SILVACO TCAD tools for several channel length (Lg) of 50, 70, 90, 130, and 180 nm respectively. The performance of the Double Gate Vertical MOSFET was analyzed by using process and device simulation which are DevEdit, ATHENA and ATLAS tools respectively. The electrical characteristics for proposed devices have been analyzed based on different channel length and the results are as shown in the I-V curve. The physical parameters extracted from the I-V curve are the threshold voltage (VT), leakage current (IOFF), active current (ION), Drain Induced Barrier Lowering (DIBL) and sub-threshold swing. From the analysis, Drain-On-Top structure is more practically better compared to Source-On-Top due to their electrical characteristic.

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