Siti Aishah, Mat Junos@Yunus (2006) Design Of Finite State Machine Memory Built-In Self Test. Project Report. UTeM, Melaka, Malaysia. (Submitted)
![]() |
PDF (24 Pages)
Design_Of_Finite_State_Machine_Memory_Built_In_Self_Test_Siti_Aishah_Binti_Mat_Junos@Yunus.pdf24_pages.pdf - Submitted Version Download (1MB) |
![]() |
PDF (Full Text)
Design_Of_Finite_State_Machine_Memory_Built_In_Self_Test_Siti_Aishah_Binti_Mat_Junos@Yunus.pdf - Submitted Version Restricted to Registered users only Download (8MB) |
Abstract
This project is designing a Design for Test (Dff) technique to test embedded memory called Finite State Machine (FSM) Memory Built-In Self Test (MBIST). The design is written using Very High Speed Integrated Circuit Hardware Design Language, (VHDL) based on the FSM architecture. The architecture will be modelled using Register Transfer Level (RTL) abstraction. A simulation on two testing algorithms is implemented on this architecture. Evaluation on area and testing time of these algorithms are carried out. The area is referring to number of logic gates used to build the circuit. While, the testing time is the completion time for testing the embedded Memory. Lastly, a comparison to Microcode Memory Built- In Self Test (MBIST) architecture evaluation is performed.
Item Type: | Final Year Project (Project Report) |
---|---|
Uncontrolled Keywords: | Machine theory, Computer architecture, Digital integrated circuits -- Design and construction |
Subjects: | T Technology > T Technology (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering |
Divisions: | Library > Final Year Project > FKEKK |
Depositing User: | Siti Syahirah Ab Rahim |
Date Deposited: | 13 Jun 2013 00:57 |
Last Modified: | 28 May 2015 03:54 |
URI: | http://digitalcollection.utem.edu.my/id/eprint/8150 |
Actions (login required)
![]() |
View Item |