Multi response optimization in strained Si-SiGe NMOS device using Taguchi based GRA

Yoganathan, Parwathy (2022) Multi response optimization in strained Si-SiGe NMOS device using Taguchi based GRA. Project Report. Universiti Teknikal Malaysia Melaka, Melaka, Malaysia. (Submitted)

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Abstract

This research will present the optimization of strained single gate Si/SiGe NMOS device with statistical Taguchi method together with Grey Relational Analysis (GRA) technique. The solution to overcome Short Channel Effect (SCE)in MOSFET scaling down technology will be explored. The virtual fabrication of the N-Channel Metal Oxide Semiconductor (NMOS) device is simulated by using ATHENA module of SILVACO Techonology Computer Aided Design (TCAD) whereas the electrical characteristics of the device will be performed using ATLAS module of TCAD. The electrical characteristics that will be explored are threshold voltage (VTH), leakage current (IOFF), drive current (ION), current state ratio (ION/IOFF), and sub threshold slope (SS). The process parameter that will be used are halo implant dose, halo implant energy, S/D implant energy and S/D implant dose. Meanwhile, Orthogonal Array (OA) Taguchi method will be used to analyze the signal to noise ratio (SNR) and Analysis of Variance (ANOVA) on the effect of process parameters. All normalised experimental results will be transformed to grey relational grade (GRG), and the process parameter with the highest GRG will be chosen as the best level. According to International Technology Road Map for Semiconductor (ITRS) 2017,the derived optimal level value must match the requirements of low power (LP) technology for the year 2017.

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