Threshold voltage and leakage current analysis on 14NM double gate bi-graphene PMOS device

Abu Bakar, Nurmishyar Shuhada (2023) Threshold voltage and leakage current analysis on 14NM double gate bi-graphene PMOS device. Project Report. Universiti Teknikal Malaysia Melaka, Melaka, Malaysia. (Submitted)

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Abstract

Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is a semiconductor device are commonly used for switching and amplification of electronics signal in electronic devices. As the technologies growth faster, the MOSFET which allowing for compacting of the transistor on a single chip. It is very critical to producing a proper work to ultra-small transistors. In this research, the threshold voltage (VTH) and leakage current (IOFF) are the aim to meet nominal the best (NTB) and minimum the better (STB) according to International Technology Roadmap for Semiconductor (ITRS) 2013. Designing a 14nm double gate with added bi-graphene with Hafnium Dioxide (HfO2) which performs as the high permittivity material (high-k) dielectric in the gate structure of the PMOS device, and Titanium Silicide (TiSix), which acts as the metal gate, is deposited on top of the HfO2 high-k layer. By using Silvaco software to design and simulate the performance of devices through the ATHENA and ATLAS modules. The optimization method in this experimental were use Taguchi L9 orthogonal array strategy to improve the device process parameters for optimum VTH and minimum IOFF according to specifications of ITRS. Target of ITRS 2013 for nominal the best VTH is 0.191V ± 12.7% while the 100 nA/μm for smaller the better IOFF. The parameter process consists of VTH adjustment implant (A), VTH energy (B), VTH tilt (C), and S/D implantation (D), while for the noise factor which is S/D energy and S/D tilt. The simulations result shows the VTH adjustment implant and VTH tilt are the most dominant and adjustment factor that high possibilities to affect the VTH and IOFF respectively. Dominant factor is the unstable value which if there are minor changes of the doping value it will affect the majority process. Although, the best setting parameter for 14nm PMOS device VTH adjustment implant was obtained 9.12E10 Atom/cm3, VTH energy 11 KeV, VTH tilt 6 °C and S/D implantation 4.80E11 °C. Therefore, the average findings VTH and IOFF after optimization with the initial result has been observed for VTH through optimization are moving from 0.190867 V (6.96 % below the ITRS 2013 target) to 0.195049 V (2.12 % higher than ITRS 2013 target value) while for the IOFF from 4.35718 nA/μm to 4.940935 nA/μm.

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