Design and development of single phase cascaded h-bridge multi-level inverter

Roslan, Ahmad Firdaus (2018) Design and development of single phase cascaded h-bridge multi-level inverter. Project Report. Universiti Teknikal Malaysia Melaka, Melaka, Malaysia. (Submitted)

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Abstract

Inverter is a power electronics device which is used to convert Direct Current (DC) into Alternating Current (AC). The conventional inverter that produces two voltage levels are no longer fulfils the requirement of reducing harmonic distortions. Therefore, Multi-Level Inverter (MLI) is implemented to solve the problem of high harmonic distortion. Instead of two levels of output, the MLI are used to produce multiple steps/stages of voltages levels to obtain a smoother and almost sinusoidal waveform. In addition, Multi-Level Inverter is treated as the one who used frequently and mostly in power converter topologies especially in handling high power and medium voltage industries. However, three of the most commonly used multi-level inverters topologies are Cascaded H-bridge Multi-Level Inverters (CHMLI), Diode Clamped Multi-Level Inverters (DCMLI), and Flying Capacitor Multi-Level Inverters (FCMLI). This project proposed a single phase cascaded h-bridge multi-level inverter (CHMLI) topology in which requires lesser number of components and it is easier to control if compared to the other methods. Inverter of different voltage levels (up to 11-Levels) are designed and simulated using MATLAB Simulink. Level Shifted Multi-Carrier PWM control scheme is used to control the operation of power switches for CHMLI in this project. The results are compared in terms of THD. These results are analyzed and discussed at the end of this report. The value of THD is found to be reduced as the number of voltage level of CHMLI increased. Besides, the hardware developing of single phase 5-Levels CHMLI is designed by using IGBTs that controlled by Field-Programmable Gate Array (FPGA) using the same PWM control scheme in simulation. Both the results from simulation and hardware are compared in the end of this project

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