Design And Development Of An Ultra-Low Power CMOS Voltage Regulator

Bee, Shei Er (2017) Design And Development Of An Ultra-Low Power CMOS Voltage Regulator. Project Report. Universiti Teknikal Malaysia Melaka, Melaka, Malaysia. (Submitted)

Text Design And Development Of An Ultra-Low Power CMOS Voltage Regulator - Bee Shei Er - 24 Pages.pdf - Submitted Version Download (539kB)

Abstract

The Low Dropout Voltage Regulator (LDO) is widely used in the industry for wide range of applications such as smart phones, tablets, wearables. These LDOs are usually demanded to be ultra-low quiescent current. Low current consumption in LDO is favouring longevity of the battery life, such LDO become part of the powering solution for IoT devices that needed long sustain battery life at all times. The objectives of this work are focusing on realization of low current consumption that gives high power efficiency low dropout voltage regulator. The design of ultra-low power LDO in this work utilises the simple topology which comprising a bandgap reference, error amplifier, a feedback-voltage divider and a pass device. The design specification for current consumption of the LDO design is in micro ampere and the operating temperature of the LDO design is between -40 degrees Celsius to 125 degrees Celsius for the input range from 1.6 V to 5V. The LDO is designed and developed in Silterra 130nm technology by using Synopsys design tool and the performance of the LDO is analysed.

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