FPGA Based Implementation Of AES Encryption Algorithm Using Xilinx System Generator

Minhad, Muhammad Suhaimi (2016) FPGA Based Implementation Of AES Encryption Algorithm Using Xilinx System Generator. Project Report. UTeM, Melaka, Malaysia. (Submitted)

Text (24 Pages) FPGA Based Implementation Of AES Encryption Algorithm Using Xilinx System Generator.pdf - Submitted Version Download (980kB)

Abstract

AES algorithm is widely used in military security and also e-baoking. This project presents 1he 256 bit AES modelling of 256 using Xilinx System Generator and its implementation on FPGA. The development of the project is divided into two phases; simuJation and implementation phase. In the simulation phase, both encryption and decryption were modelled using Xilinx System Generator by referring to the AES standard docwnent. 1n the imp1ementation phase~ the design was synthesized and then implemented on FPGA. The results obtained from FPGA implementation was similar to simulation.

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