Universal Time And Calendar System In Field Programmable Gate Array (FPGA)

Fatin Shaj, Ahmad Jamal (2014) Universal Time And Calendar System In Field Programmable Gate Array (FPGA). Project Report. UTeM, Melaka, Malaysia. (Submitted)

Text (24 Pages) Universal Time And Calendar System In Field Programmable Gate Array (FPGA) 24 Pages.pdf - Submitted Version Download (616kB)

Abstract

A clock and calendar system is normally controlled by many chips in order to regulate the frequency of the clock pulse to obtain cycles for seconds, minutes, hours, days, days of the month, months and years. In FPGA, time and calendar system is a part of a bigger system that is implemented in our daily life such as in alarm clock, database system, registration system, punch card system and many more. However, most of the time and calendar system were used in a discrete component that are bigger in size and expensive. This is because of the different interface use in the embedded system that used many ICs for just a simple system. Therefore, the main goal of this project is to design a Time and Calendar System in Field-Programmable Gate Array through hardware description language (Verilog) without using discrete components. This project displays a maximum of 7 days weekly timer with months and year. The time will read from zero to a maximum year = 9999, day = 6, hour = 23, minutes = 59, seconds = 59. In addition, it is also can read from one to a maximum month = 12 and day of the month = 31. The system is run by a standard quartz crystal clock 10MHz. A LP-2900 trainer board is used to test the prototype with a Xilinx FPGA chip. The FPGA is programmed using Verilog.

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