Ultra Thin Body 18nm SOI N-MOSFET (The Effect Of Sidewall Spacer Oxide Thickness To The Device Performance)

Fidzrie Hafiz, Razali (2015) Ultra Thin Body 18nm SOI N-MOSFET (The Effect Of Sidewall Spacer Oxide Thickness To The Device Performance). Project Report. UTeM, Melaka, Malaysia. (Submitted)

Text (24 Pages) Ultra Thin Body 18nm SOI N-MOSFET (The Effect Of Sidewall Spacer Oxide Thickness To The Device Performance).pdf - Submitted Version Download (526kB)

Abstract

This research focus on Ultra-Thin Body Silicon On Insulator (UTB SOI) which is fully depleted. The structure is an improvement from the conventional MOSFET which further improve the performance of the device. UTB SOI is much preferred than conventional MOSFET because of thinner body thickness, smaller leakage current and able to improve power consumption. This research project is focus on the design of UTB SOI device which can be scaled down to 18nm with 5.8nm body thickness. The metal gate is used for the gate known as titanium instead of polysillicon gate. It is much more ideal for charging and discharging the gate capacitance of the transistor and resulting in faster operating circuit. Furthermore, the utilization of metal gate is important to get the smallest value of gate resistance near to 0 and able to reduce leakage current. This research also includes the effect of sidewall spacer oxide thickness variation on the UTB SOI performance. Athena and Atlas of Silvaco Simulator have been used to design and simulate in order to obtain the result of MOSFET structure, IV characteristic, the leakage current, the drive current and the sub threshold slope.

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