Design And Characterization Of Vertical Strained Silicon MOSFET Incorporating Dielectric Pocket By Using TCAD Tools

Nazirah, Makhtar (2013) Design And Characterization Of Vertical Strained Silicon MOSFET Incorporating Dielectric Pocket By Using TCAD Tools. Project Report. UTeM, Melaka, Malaysia. (Submitted)

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Abstract

This project is about to design and characterize the Vertical Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-VMOSFET) by using SILVACO Technology Computer Aided Design (TCAD) tools. SILVACO TCAD tool is a program, which allow for creation, fabrication, and simulation of semiconductor devices. The structure of the vertical MOSFET leads to a double channel width that is increasing the packaging density. The strained silicon MOSFET is introduced to modify the carrier transport properties of silicon in order to enhance transport of both electrons and holes within strained layer. Dielectric pocket is act to control encroachment of the drain doping into the channel and reduce short channel effects (SCE). Overall, SDP- VMOSFET, which is combining Vertical MOSFET, Strained Silicon and Dielectric Pocket can overcome the short channel effect in term of leakage current, threshold voltage roll-off also Drain Induce Barrier Lowering (DIBL). As a result, SDP- VMOSFET produces a better threshold voltage and DIBL compared to related structures. Meanwhile, it gives slightly increased for leakage current compared to Vertical MOSFET Incorporating Dielectric Pocket. The characteristics of the SDP- VMOSFET are analysed in order to optimize the performance of the device and leading to the next generation of IC technology.

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