Lot Testing Scheduling System For Infineon

Lew , Mei Yee (2006) Lot Testing Scheduling System For Infineon. Project Report. UTeM, Melaka, Malaysia. (Submitted)

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Abstract

The project is known as Lot Testing Scheduling System for lnfineon (L TSS). This software project is purposely developed to help Module Assembly and Test department of Qimonda, Infineon for schedule testing lot of production line. L TSS assists APT production line to work productively. The testing lot will moved to APT after completed Advantest, so LTSS responsible to plan the start lot time and cluster (tester) will used for testing. Firstly, LTSS can estimate the expected finish time of active lo~t APT. Secondly, LTSS calculate the expected start time and expected finish time of waiting lot. At the same time, LTSS plan appropriate cluster for the waiting lots. In doing these modules, the measurements such as operation, module type, number of mother boards, and testing flow need to be count on. This software project is developed by using MS Visual Basic version 6 and MS Access for database. The methodology being applied in the system is Rational Unified Process (RUP). The reasons for the proven framework RUP being chosen because needs to work with the users of Infineon to explore their requirements and refining these through many versions until an adequate system has been developed.

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