Development of basic design for testability trainer for educational laboratory

Ahmad Zaidi, Fatin Nabilah (2025) Development of basic design for testability trainer for educational laboratory. Project Report. Universiti Teknikal Malaysia Melaka, Melaka, Malaysia. (Submitted)

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Abstract

Design for Testability (DFT) is a crucial aspect of integrated circuit (IC) design that focuses on incorporating specific features into a hardware design to make it easier to test for faults. As semiconductor technologies advance, ICs become more complex, making it increasingly challenging to ensure their reliability and functionality without effective testing strategies. Despite the critical role of DFT in the industry, practical education and training in this field are limited, particularly in Malaysia, where there is a significant need for skilled professionals proficient in DFT methodologies. To address this issue, an FPGA based DFT trainer was developed. The project involved designing and implementing fault free and faulty full-adder and combinational circuits using Verilog HDL, followed by validation through practical experiments. The analysis focused on stuck-at faults, using test patterns to detect and diagnose errors. The trainer offers students hands-on experience with fault detection, improving their understanding of DFT methodologies. The results confirm the trainer's effectiveness as an educational resource, bridging the gap between theoretical knowledge and practical application. Future improvements include adopting multi-layer PCBs, non-volatile FPGAs, and automating testing processes for greater efficiency and functionality.

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