Hamming Code Using Field Programmable Gate Array (FPGA)

Siti Basirah, Amir Hamzah (2014) Hamming Code Using Field Programmable Gate Array (FPGA). Project Report. UTeM, Melaka, Malaysia. (Submitted)

Text (24 pages) Hamming Code Using Field Programmable Gate Array (FPGA) 24 Pages.pdf - Submitted Version Download (162kB)

Abstract

This project is all about the transmission of data in a memory which might cause the soft errors during the transmission. Hamming Code module will be developed in an FPGA environment, to detect and correct faulty bits during memory data transfer. The information sent should be the same as the information received. The Hamming Code is needed to avoid any problems that might happen during data transmission in a memory. This gives an advantage to user because any kind of error of will be detected within a short time. Furthermore, Hamming Code is very helpful in correcting them. This Hamming Code is a sophisticated pattern of parity check that allows the correction of single errors along with the detection of double errors. Hamming Code consists of two modules that are hamming code encoder and hamming code decoder. The hamming code encoder is the data before it is sent through the channel. While the hamming code decoder is the data after it is sent through the channel. When the error correcting bits are included with a message and those bits can be arranged such that different incorrect bits will produce different errors result and then the corrupted bit could be identified. In an 8-bit data transfer, there are eight possible single bit errors. Three control bits could potentially specify not only that an error occurred, but also which bit caused the error. The hamming code is applied to data units of any length and it uses the relationship between the data and the redundant bits which has the capability of correcting single bit errors. The 8-bit code requires four redundancy bits that can be added at the end of the data unit or intermittent with the original data bits to form hamming code. Field Programmable Gate Array (FPGA) is based designs that more susceptible to soft errors in the mapped design. The Verilog software is needed for this project which it is a hardware description language.

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